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'el : Enable TX register = 1
'ef : Enable RX FIFO buffer = 1
'Select 868 MHz band
'Select 12 pF crystal load capacitor
'80E7
'er : Enable receiver chain = 1
'ebb : Enable baseband circuit = 0
'et : Enable PLL,PA, TX = 0
'es : Enable synthesizer = 1
'ex : Enable crystal oscillator = 1
'eb : Enable low battery detector = 0
'ew : Enable wake-up timer = 0
'dc : Disable clock output = 0
'8298
'Set center frequency to 868.3 MHz
'A67C
'Set datarate to 10.77586 kbps
'C61F
'p16 : 0=INTin, 1=VDIout = 1
'VDI response time = Fast
'Receiver bandwidth = 270 kHz
'LNA gain = 0 dB
'RSSI threshold = -103 dBm
'9460
'al : Clock recovery auto lock control = 1
'ml : Clock recovery lock control = 0
's : (0=digital, 1=analog filter) = 0
'DQD threshold = 4
'C2AC
'sp : Select single Byte Sync pattern = 0
'al : Disable Sync pattern recognition = 0
'ff : FIFO fill = 0
'dr : Disable highly sensitive Reset = 1
'FIFO IT level = 8
'CA81
'Synchron pattern = D4
'CED4
'AFC automatic mode = Keep offset when VDI=h
'st : Strobe edge = 0
'fi : Fine mode = 0
'oe : Offset register enable = 1
'en : Calculate offset = 1
'Range limit = No restriction
'Max. Deviation = N/A
'C483
'mp = 0
'Delta f (fsk) = 90 kHz
'Output power = 0 dB
'9850
'lpx : Enable low power crystal oscillator = 0
'ddy : Enable phase detector delay = 0
'ddit : Disable PLL loop dithering = 1
'Select clock output slew rate control for 2.5 MHz or less
'Select PLL bandwidth for max. 256 kbps
'CC67
'T wakeup = 0 ms
'E000
'en : Enable low duty-cycle = 0
'Duty-cycle = N/A
'C800
'Vlb = 2.2 V
'Clock output = 1.66 MHz
'C040